Hyperscaler custom silicon 2026: Google TPU v7, Microsoft Maia 2, AWS Trainium 3

The three largest US hyperscalers — Google, Microsoft, and Amazon — each run a custom AI accelerator program to reduce dependence on Nvidia. As of 2026, all three programs are at production scale: Google's TPU v7 (Ironwood) is in volume deployment, Microsoft's Maia 2 is ramping, and AWS Trainium 3 is sampling. This article covers the architecture, target workloads, and the strategic question of how much share each can take from Nvidia Rubin in their respective clouds.

Why hyperscalers build custom silicon

Three reasons drive the custom-silicon programs:

1. Cost — Nvidia data-center GPUs cost $30,000-$40,000 per unit. A custom accelerator at $5,000-$15,000 per unit with comparable inference throughput can shift cloud unit economics.
2. Supply priority — Nvidia allocates H100/B200/Rubin supply proportionally to historical order volume. Hyperscalers with internal alternatives have more leverage in price negotiations.
3. Workload optimization — a custom chip designed for a specific model's compute pattern (e.g. transformer inference) can outperform a general-purpose GPU at lower power.

The trade-off is ecosystem: Nvidia's CUDA + TensorRT + NIM stack is a real moat. Hyperscaler software frameworks (JAX/TPU, ONNX/Maia, NeuronX/Trainium) have closed much of the gap but still lag in third-party model coverage.

Google TPU v7 (Ironwood)

TPU v7, codenamed Ironwood, is Google's seventh-generation Tensor Processing Unit. It launched in late 2025 and is now in volume deployment across Google Cloud + Google internal workloads (Search, Gemini, YouTube).

Architecture

• Process: TSMC N3P (3nm) — first TPU on 3nm.
• Memory: HBM3e, 192GB per chip (up from 96GB on TPU v6 Trillium).
• Compute: 2nd-gen SparseCore + 4th-gen Matrix Multiply Unit. FP8 throughput ~1.5× TPU v6.
• Interconnect: ICI (Inter-Chip Interconnect) at 1.6 TB/s per chip.
• Scale: Pods of 9,216 chips (vs 4,096 on Trillium).

Why TPU v7 exists

Google's strategy is full-stack control: TPU + Gemini model + Vertex AI serving infrastructure. By owning all three, Google can optimize each layer for the others. TPU v7 is designed explicitly for Gemini 3 inference, with sparse compute units that accelerate the mixture-of-experts (MoE) routing pattern.

Workloads

• Google internal: ~60% of TPU v7 capacity is consumed by Search ranking + Gemini serving + YouTube recommendations.
• Google Cloud customers: ~40% allocated to external customers via Vertex AI. Notable adopters: Anthropic (Claude training), Apple (internal models), Character.AI, Hugging Face enterprise tier.

Microsoft Maia 2

Maia 2 is Microsoft's second-generation custom AI accelerator, designed by a team led by former Apple silicon designer Mike Filippo. It launched in 2025 with deployment starting Q1 2026.

Architecture

• Process: TSMC N5 (5nm) — note: not 3nm. Microsoft prioritized time-to-market over process node.
• Memory: HBM2e, 96GB per chip (modest by 2026 standards).
• Compute: Maia 2 is designed for inference only. FP8 throughput is competitive with Nvidia H200, but FP16/BF16 is weaker.
• Interconnect: Custom mesh network for chip-to-chip. 600 GB/s per chip.
• Scale: Pods of 1,024 chips.

Why Maia 2 exists

Microsoft's primary AI workloads are Copilot (Bing + Office + Windows) and Azure OpenAI service. Maia 2 is purpose-built for these inference-heavy workloads, where Microsoft's procurement costs from Nvidia exceed $10B/year. Internal projections target ~30% cost reduction vs equivalent Nvidia fleet.

Workloads

• Microsoft internal: Copilot inference, Bing ranking, Teams transcription. Target: 50% of internal AI workloads on Maia by end of 2026.
• Azure customers: Limited external availability. Currently only Azure OpenAI customers can deploy on Maia 2, with Microsoft controlling the model choices.

Maia 100 (2025, predecessor)

Maia 100, the first-generation chip, deployed in late 2024 in a limited 4,000-chip cluster. It is now considered a "learning experience" — the team publicly stated the design was over-budget and under-performed Nvidia H100. Maia 2 is the first credible Microsoft custom-silicon part.

AWS Trainium 3

Trainium 3 is AWS's third-generation training-and-inference accelerator, built in partnership with Marvell (after the original Annapurna Labs team left for Meta). It launched at re:Invent 2025 and is now sampling with general availability targeted Q3 2026.

Architecture

• Process: TSMC N3 (3nm) — first Trainium on 3nm.
• Memory: HBM4, 144GB per chip (vs 96GB HBM2e on Trainium 2).
• Compute: 4th-generation NeuronCore. FP16 throughput ~2× Trainium 2. FP8 ~2.5× Trainium 2.
• Interconnect: NeuronLink-v3, 800 GB/s per chip.
• Scale: Pods of 64,000 chips (UltraCluster scale).

Why Trainium 3 exists

AWS's strategy is to be the price/performance leader for AI training in the cloud. Trainium 3 is positioned ~30% cheaper per FLOP than equivalent Nvidia H200 instances for transformer training, targeting customers who are price-sensitive and willing to use the NeuronX SDK.

Workloads

• AWS internal: Limited. AWS does not have an internal AI workload of Microsoft's scale. Most Trainium 3 is sold to external customers.
• AWS customers: Anthropic (Claude training, primary compute), Databricks (model training), Hugging Face (inference), and a long tail of startups.

Anthropic dependency

Anthropic is the anchor Trainium 3 customer, with AWS + Anthropic co-developing the chip. Anthropic has committed to ~$4B of Trainium 3 spend over 2026-2027, representing a significant share of AWS's overall chip procurement. This is a single-point-of-failure risk for Trainium's economics — if Anthropic's training workload doesn't scale as projected, Trainium 3 utilization will suffer.

Comparative summary

Chip	Process	Memory	FP8 TOPS	Pod scale	Launch	Primary customer
TPU v7 (Ironwood)	TSMC 3nm	HBM3e 192GB	~1,500	9,216 chips	Late 2025	Google internal + Vertex AI
Maia 2	TSMC 5nm	HBM2e 96GB	~800	1,024 chips	Late 2025 (GA Q1 2026)	Microsoft Copilot
Trainium 3	TSMC 3nm	HBM4 144GB	~1,200	64,000 chips	Sampling (GA Q3 2026)	Anthropic + AWS external
Nvidia Rubin R100	TSMC 3nm	HBM4 288GB	~30,000	NVL72 rack	Q4 2026	All major clouds

The 3nm custom chips (TPU v7, Trainium 3) are more competitive than Maia 2 on a per-chip basis, but Maia 2's scale-up is sufficient for Copilot workloads (which favor per-chip latency over per-pod throughput).

How much Nvidia share can custom silicon take?

Realistic estimates for 2027 hyperscaler accelerator share:

• Google: TPU v7 + v8 will handle ~55% of Google's AI compute (internal + external). Nvidia stays at ~45%.
• Microsoft: Maia 2 + Maia 3 (planned 2027) will handle ~35% of Microsoft's AI compute. Nvidia stays at ~65%.
• AWS: Trainium 3 + 4 will handle ~25% of AWS's AI compute. Nvidia stays at ~75%.

Google has the highest in-house share because it has the longest-running custom-silicon program (TPUs since 2016) and the strongest software stack (JAX, Gemini). AWS has the lowest because Anthropic is essentially the only large external customer.

What to watch

1. TPU v8 announcement — expected at Google Cloud Next 2027 (April). Will likely move to 2nm process and HBM4e memory.
2. Maia 3 architecture disclosure — Microsoft will need to address the 5nm → 3nm gap and HBM2e → HBM3e transition.
3. Anthropic + Trainium 3 scale-up — first 10,000-chip cluster deployment (target Q1 2027) will validate the chip's economics.
4. ROCm + NeuronX parity with CUDA — independent benchmarks (MLPerf 4.1) will determine whether custom silicon can credibly challenge Nvidia beyond the hyperscalers that co-design the chips.

For buyers and developers, the practical implication is that AI workloads running on hyperscaler clouds will increasingly run on custom silicon, with Nvidia positioned as the high-end premium option. Pricing pressure on Nvidia will filter through to consumer GPU pricing eventually, but in 2026-2027 the data-center AI silicon landscape will be three-horse (Nvidia + AMD + hyperscaler in-house), not Nvidia-dominated.

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Bottom line: Hyperscaler custom silicon has reached production scale. TPU v7, Maia 2, and Trainium 3 are real alternatives to Nvidia for inference-heavy workloads, with credible software ecosystems. Nvidia's data-center dominance will not end in 2026-2027, but the era of "everyone runs Nvidia" is over — especially at Google, where TPU has become the default for Gemini and major external customers.